1. Field of the Invention
The present invention relates to a solid-state imaging device with the generation of dark currents suppressed, a manufacturing method for the solid-state imaging device, and an imaging apparatus.
2. Description of the Related Art
In video cameras and digital still cameras, solid-state imaging devices including CCD (Charge Coupled Device) or CMOS image sensors are widely used. A reduction in noise as well as improvement of sensitivity is an important object for all the solid-stage imaging devices.
Regardless of a state in which there is no incident light, i.e., a state in which there is no pure signal charge generated by photoelectric conversion of incident light, charges (electrons) caused by micro-defects present in a substrate interface of a light-receiving surface are captured as signals and change to micro-currents. The micro-currents are detected as dark currents. Further, dark currents are caused by a deep level defect existing in an interface between a Si layer and an insulating layer (interface state density). In particular, these dark currents are noise that should be reduced for a solid-state imaging device.
As a method of suppressing the generation of the dark currents due to the interface state density, for example, as shown in (2) in FIG. 54, an embedded photodiode structure having a hole accumulation layer 23 including a P+ layer on a light-receiving section (e.g., a photodiode) 12 as shown in (2) in FIG. 54 is used. In this specification, the embedded photodiode structure is referred to as HAD (Hole Accumulated Diode) structure.
As shown in (1) in FIG. 54, in the structure in which the HAD structure is not provided, electrons due to interface state density flow into the photodiode as dark currents.
On the other hand, as shown in (2) in FIG. 54, in the HAD structure, the generation of electrons from the interface is suppressed by the hole accumulation layer 23 formed in the interface. Even if charges (electrons) are generated from the interface, since the charges (electrons) flow in the hole accumulation layers 23 of the P+ layer in which a large number of holes are present without flowing into a charge accumulation portion forming a well of potential in an N+ layer of the light-receiving section 12, the charges (the electrons) can be eliminated.
Therefore, it is possible to prevent the charges due to the interface from changing to dark currents to be detected and suppress the dark currents due to the interface state density.
As a method of forming the HAD structure, it is a general practice to, after ion-implanting impurities forming the P+ layer, for example, boron (B) or boron difluoride (BF2) via a thermal oxide film or a CVD oxide film formed on a substrate, apply activation of the implanted impurities with annealing and form a P-type region near the interface.
However, heat treatment at high temperature equal to or higher than 700° C. is necessary and indispensable for activation of doping impurities. Therefore, it is difficult to form a hole accumulation layer by ion implantation in a low-temperature process at low temperature equal to or lower than 400° C. Even when it is desired to avoid activation for long time at high temperature in order to suppress the spread of a dopant, the method of forming a hole accumulation layer by applying the ion implantation and the annealing is not preferable.
When silicon oxide or silicon nitride are formed on an upper layer of a light-receiving section by a method of low-temperature plasma CVD or the like, compared with an interface between a film formed at high temperature and a light-receiving surface, interface state density is deteriorated. The deterioration in the interface state density causes an increase in dark currents.
As described above, when it is desired to avoid the ion implantation and the annealing at high temperature, it is difficult to perform formation of the hole accumulation layer by the ion implantation in the past. Moreover, the dark currents tend to worsen. To solve such a problem, it is necessary to form a hole accumulation layer with another method not depending the ion implantation in the past.
For example, there is disclosed a technique for increasing the potential of the surface of a photoelectric conversion section by embedding, in an insulating layer made of silicon oxide on a photoelectric conversion element having a conduction type opposite to a conduction type of a semiconductor region formed in the semiconductor region, charge particles having the opposite conduction type and the same polarity and forming an inversion layer on the surface to thereby prevent depletion of the surface and reduce the generation of dark currents (see, for example, JP-A-1-256168).
However, in the technique, although a technique for embedding charge particles in the insulating layer is necessary, it is unclear what kind of embedding technique should be used. In general, in order to inject charges into an insulating film from the outside as in a nonvolatile memory, an electrode for injecting charges is necessary. Even if charges can be injected in a non-contact manner from the outside without using the electrode, in any case, the charges trapped in the insulating film should not be detrapped. A charge holding characteristic poses a problem. Therefore, a high-quality insulating film with a high charge holding characteristic is demanded but it is difficult to realize the insulating film.